Photolithography (or “optical lithography”) is a complex process used in semiconductor processing to selectively remove parts of a thin film or the bulk of a substrate to build structures. This process uses light to transfer a geometric pattern from a photo mask to a light-sensitive chemical, e.g., photoresist or “resist,” on the substrate. A series of chemical treatments, e.g., etching processes, then engraves the exposure pattern into the material underneath the photoresist. In complex integrated circuits, for example a modern CMOS, a wafer may go through the photolithographic cycle up to 50 times. The patterning can be used to form gates, as well as isolation structures, wiring layers, contacts, etc.
As the imaging becomes ever so smaller in newer technologies, the photolithographic process must transfer smaller and smaller images (patterns) onto the photo mask. However, as conventional resolution limits of lithography continue to be exceeded, in particular at the 15 nm node, and beyond, new technology integration schemes may be needed to ease the burden on patterning. For example, in newer technologies it is becoming difficult to isolate transistors (gates) with critical spacing, while maintaining the minimum image of the gate electrodes, themselves. To ensure minimum image of the gate electrodes and that gates remain isolated (e.g., do not short circuit), large isolation regions are formed between gates. This can be accomplished with photolithographic process since such large isolation regions do not exceed conventional resolution limits of lithography. Although these large isolation regions allow the designer and engineer to maintain the minimum image of the gates, such isolation regions take up valuable chip real estate. This, in turn, limits the density of the chip.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.